Self Bias of Depletion MOSFET

Self bias method is one of many methods of biasing depletion MOSFET. Other types of mosfet biasing includes zero bias, fixed gate bias, voltage divider bias, drain feedback bias, two supply bias and two supply bias with current source. One advantage of using self bias is that only one power supply is needed. Another advantage is better stabilization of the operating point.

Circuit Diagram & Operation

Self bias circuit is obtained from fixed gate bias by removing the gate voltage and including a source resistor in the source terminal. The following shows the circuit diagram of self biased depletion MOSFET.

Here the depletion MOSFET LND150 is used for illustration purpose. Due to the resistor $R_S$ voltage will be developed at the source $V_S$ which is feedback to the gate to negatively bias the gate to source junction. Any increase in drain current due to environment or noise causes the voltage at the source to decrease which in turn increases the gate to source voltage. The increase in gate to source voltage causes the decrease in the drain current and hence compensates the increase of drain current due to the noise or environment changes such as due to temperature.

Select Bias Point

The depletion MOSFET can be biased either in the ohmic or linear region(active region). The selection of the operating point or Q-point depends upon the application. When FET(JFET,MOSFET) are used as amplifier they are biased in the active region. The zero bias or fixed bias method will not produce stable Q-point in the active region. To bias the MOSFET in active region self bias can be used.

We select the operating point or bias point Q as shown in the figure below.

 The selected Q-point or the bias point is at,

$V_{DSQ}$ = 4V,  $I_{DQ}$ = 3.62mA 

Find Gate to Source voltage $V_{GS}$

The gate to source voltage $V_{GS}$ for given drain current at operating point $I_{DQ}$ = 3.62mA  can be calculated from the Shockley equation,

$I_D=I_{DSS} (1- \frac{V_{GS}}{V_{GS(off)}})^2$

or,

$V_{GS}= V_{GS(off)}(1- \sqrt{\frac{I_{DQ}}{I_{DSS}}})$

 From the graph above or the datasheet we have,

$V_{GS(off)}=2V$ and $I_{DSS}=2.33mA$

Thus,

 $V_{GS}= 2V(1- \sqrt{\frac{3.62mA}{2.33mA}})$

that is,   $V_{GS}= 0.49V$

Find source voltage

In self bias the source voltage is equal to gate to source voltage,

$V_S = -V_{GS}$

that is,

$V_S = 0.49V$

Find source resistor

 We have,

$R_S=\frac{V_S}{I_{DQ}}$

or,

$R_S= \frac{0.49V}{3.62mA}$

that is, $R_S=135.3 \Omega$

Find drain voltage

We have,

 $V_D=V_{DSQ}+ V_S$ 

or,  $V_D=4V + 0.49V$ 

that is, $V_D=4.49V$ 

Find drain resistor

We have,

$R_D= \frac{V_{DD}- V_D}{I_{DQ}}$ 

or, $R_D= \frac{5V- 4.49V}{3.62mA}$ 

that is, $R_D= 140.88\Omega$

 Completed Circuit Diagram

The following shows completed circuit diagram self biased depletion MOSFET with the calculated value above.

Self Biased Depletion MOSFET Amplifier

The above self biased depletion MOSFET can be used as an amplifier. The input signal is fed into the amplifier using input capacitor C1 and the output can be taken via another coupling capacitor C2. 

Depletion MOSFET amplifier with bypassed capacitor

The following shows depletion MOSFET amplifier with source resistor bypassed by capacitor C3.

The following shows how to calculate the coupling and bypass capacitor values for the above FET amplifier.

The approximate input impedance of self biased MOSFET is,

$Z_i \simeq R_G = 10M\Omega$

The input coupling capacitor is,

$C_1 = \frac{1}{2 \pi f (0.1) Z_i}$

Let the frequency of operation be 1kHz,

$C_1 = \frac{1}{2 \pi (1kHz)(0.1)(10M\Omega)}$

that is, $C_1 = 0.159 nF$

The approximate output impedance of self biased MOSFET is,

$Z_o \simeq R_D = 140.88\Omega$

The output coupling capacitor is,

$C_2 = \frac{1}{2 \pi f (0.1) Z_o}$

For frequency of 1kHz,

$C_2 = \frac{1}{2 \pi (1kHz)(0.1)(140.88\Omega)}$

that is, $C_2 = 11 uF$

The bypass capacitor is calculated as follows,

 $C_3 = \frac{1}{2 \pi f (0.1) R_S}$

For frequency of 1kHz,

$C_3 = \frac{1}{2 \pi (1kHz)(0.1)(135.3\Omega)}$

that is, $C_3 \simeq 11 uF$

Recommended Tutorials

 - JFET Biasing Worked Out Example Calculation

- Import spice model in Proteus and draw JFET drain curve

- How to design Self Biased BJT amplifier