JFET(Junction Field Effect Transistor) can be biased either in the Ohmic Region or Active Region. When JFET is operated in ohmic region it acts like a resistor. When JFET is operated in the active region it acts as a current source. In this tutorial we illustrate how to bias JFET in ohmic region, how to bias JFET in active region using self bias and voltage divider biasing methods.
Biasing JFET in Ohmic Region
Here we explain how to bias JFET transistor in Ohmic region. JFET can be biased in the ohmic region in two ways. One is the hard saturation method and the other is gate bias method.
Hard Saturation
In hard saturation method of biasing JFET in ohmic region, we simply short the gate(with or without a gate resistor) thus making VGS=0, read the value of IDSS value in the datasheet for the case of VGS=0 and use the following formula for drain saturation current as follows,
ID(sat)=VDDRD
and make sure ID(sat) is much less than IDSS. That is,
ID(sat)<<IDSS
The following shows circuit diagrams with and without gate resistor to bias a JFET transistor using hard saturation method.
without gate resistor:
with gate resistor:
Here Rg is the gate resistor of high value is used. This gate resistor does not effect the biasing. The gate is still at zero volt and it is used to isolate ac signal from ground when used in amplifier application.
Consider the case that we want to bias 2N5459 JFET transistor in ohmic region using hard saturation method. If we read the datasheet of 2N5459 JFET transistor, when VGS=0, IDSS=9mA.
Let us suppose that VDD=5V and we use RD=10KOhm then, the drain saturation current is calculated as,
ID(sat)=VDDRD==5V10KΩ=0.5mA
Since, ID(sat)=0.5mA is much less than IDSS=9mA the JFET will be in hard saturation and the JFET will be operating in ohmic region.
The following circuit diagrams shows biasing 2N5459 JFET transistor using hard saturation method with and without gate resistor with the calculated value above.without gate resistor:
with gate resistor:
Fixed Bias or Gate Bias
Another method of biasing JFET transistor in ohmic region is fixed bias also called gate bias method. Here we explain how to bias JFET transistor in ohmic region using fixed bias or gate biasing method.
Fixed biasing simply means we apply negative gate bias −VGG to the gate of the JFET to reverse bias the gate to source junction −VGS. We can choose either to use or not to use gate resistor.
When gate resistor is used, a high resistor value is used. The gate resistor does not effect the biasing of the transistor when operating in the ohmic region. The gate voltage will still be zero.
The value of the drain resistor RD is chosen according to the drain voltage VD required in the circuit. The drain voltage VD can be calculated using the following equation,
VD=VDD−IDRD
Biasing JFET in Active Region
JFET transistor when biased in the active region acts as current source. When biased in active region, JFET is used in amplifier application and mixer/modulators as illustrated in the tutorial AM modulator using JFET transistor and AM modulator design with Two JFET transistors. JFET transistor can be biased in active region using self bias or voltage divider bias. Here we illustrate how to bias JFET transistor in active region using self bias. For other active region biasing of JFET see the following tutorials:
- JFET Two Supply Bias with Current Source
Self Bias
To bias a JFET transistor what we need to do is simply connect a source resistor RS at the source terminal of the JFET transistor and ground the gate terminal with a gate resistor. The following shows circuit diagram of self biased JFET transistor.
Why this JFET circuit called self biased circuit is that with source resistor RS connected and with source current IS flowing through it, voltage called source voltage VS is developed which reverse biases the gate to source junction and hence the JFET transistor is biased. This means that gate to source voltage, VGS, is negative which is required to operate N-type JFET transistor.
The gate resistor RG does not effect the biasing circuit, and is useful to isolate ac signal from ground in amplifier application. The gate voltage is still at 0V. A high value of gate resistor RG is used to increase input impedance. So we usually choose RG arbitrarily large to prevent loading on the driving stage in a cascaded amplifier designs.
Following shows the voltage developed at different points in the circuit.
Thus while biasing the JFET transistor using self bias method, the first thing we have to ensure that gate to source voltage VGS is reversed biased. From the circuit above we have,
VGS=VG−VS
But since the gate voltage VG=0 we have,
VGS=−VS
And since, VS=ISRS=IDRS (because IS=ID) we have,
VGS=−IDRS
So by selecting proper value of ID and RS we can ensure that VGS is negative and the gate to source junction is reversed biased. We can rearrange the above equation to find the value of source resistor RS as follows,
RS=|VGSID|
where the double line means to use absolute values.
Thus if we know the value of VGS and ID we can know the value of source resistor RS to self bias the circuit. So to self bias the circuit we need either to calculate ID knowing VGS or calculate VGS knowing ID.
Midpoint Bias
For designing JFET amplifier it is usually desirable to bias the JFET so that the drain current ID has maximum swing between 0 and IDSS. For this the drain current ID should have value of IDSS/2, that is,
ID=IDSS2
The transconductance curve is given by,
ID≃IDSS(1−VGSVGS(off))2
Using ID=IDSS2 then we can derive value for VGS which evaluates approximately as,
VGS=VGS(off)3.4
The drain voltage VD can be set using the drain resistor RD. The drain voltage VD is set half of the supply VDD.
The next tutorial JFET Biasing Worked Out Example Calculation we show with calculation example and simulation how to bias JFET trransistor.